Date listed
2 weeks agoEmployment Type
Full timeFound on:
At Lamb Labs, we're building a new AI chip: the Model Processing Unit (MPU).
Modern AI inference is constrained by the cost of moving model weights between memory and compute. We're taking a fundamentally different approach: aggressively compressing and optimizing language models so that their weights and computation can be encoded directly into silicon.
We're developing extremely low-bit language models and custom hardware architectures together, with the goal of making inference orders of magnitude faster and more energy-efficient.
We're a small, research-driven team working at the intersection of machine learning, compilers and computer architecture. We care about fundamental ideas, rigorous experimentation and turning research into working systems.
We're looking for an exceptional ML engineer or researcher to work on some of the hardest problems in low-bit language model inference.
You'll help develop the models and algorithms that make our hardware architecture possible.
Our focus is on pushing language models to extremely low precision, particularly 1–2-bit weights, while preserving as much model quality as possible. But this goes well beyond weight quantization.
You'll work across activation quantization, KV-cache optimization, attention, numerical representations, training and fine-tuning, and the broader challenges of running highly compressed language models efficiently.
We're not looking for someone who simply knows how to use existing quantization libraries. We want someone who understands these methods deeply, can identify their limitations, and can develop better ones.
You'll have broad ownership of the problem, from understanding the mathematical and numerical behavior of models to implementing new techniques, running experiments and working directly with our hardware team.
At Lamb Labs, the model and the chip are designed together. Your research will directly influence how we build our silicon.
Extreme low-bit quantization
Activations, attention and KV-cache
Training, fine-tuning and model quality
Hardware-aware model optimization
Inference research and engineering
You'll have significant freedom to pursue the approaches that work, whether that means developing new quantization algorithms, modifying model architectures, improving training procedures or rethinking how inference is performed.
We're looking for someone with genuinely deep technical expertise in language models, model compression or low-precision inference.
You might be a researcher who has developed novel quantization techniques, an engineer who has spent years optimizing LLM inference, or someone who has independently built exceptional systems.
We care much more about what you've done and what you understand than your title or credentials.
Ideally, you have:
We're particularly excited about candidates with a PhD or equivalent depth of research and engineering experience in machine learning, computer architecture, numerical optimization or a related field.
A PhD is not required. Significant original research, open-source contributions or exceptional industry experience can be equally compelling.
Any of the following would be especially relevant:
You don't need experience with all of these. Exceptional depth in one area, combined with the ability and ambition to tackle the others, is exactly what we're looking for.
Work on fundamental problems. Extreme low-bit inference is still an open research area. You'll have the opportunity to develop new methods rather than simply apply established ones.
Design models and hardware together. Your work won't be constrained by the assumptions of existing GPU architectures. You'll help shape the numerical representations and computations that go into our custom silicon.
Own your work end to end. You'll have the freedom to pursue an idea from first principles through experiments, model training and implementation.
Work with exceptional technical depth. We're building a small team of people who want to solve difficult problems across machine learning and computer architecture.
See research become real hardware. Your work will directly contribute to the models and algorithms implemented in our FPGA prototypes and future ASICs.
We're looking for people who are excited by questions like:
How much intelligence can we preserve in a 1-bit model? Can we quantize activations and KV caches just as aggressively as weights? What if we designed the model around the hardware from the beginning?
If these are the kinds of problems you think about, we'd love to hear from you.
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